We find a passion for VLSI design in every single Resume we receive. But, do you know what to choose and how to build your career in VLSI? QualCore Logic has continuously evolved career growth opportunities which resulted in the creation of a number of leaders in the field.
QualCore Logic has a rich Digital and Analog IP profile and many well-known companies have licensed our IPs. We have taped out designs with gate counts in the range of 1 to 15 Million gates and our experience in SoC designs has been growing significantly each year.
The environment at QualCore is friendly and conducive for quick growth. If you are yearning to learn every day, QualCore Logic is the right place for you.
Please send your resume to jobs@qualcorelogic.com.
| I/O DESIGNER – ANALOG/MIXED SIGNAL |
| ANALOG DESIGN ENGINEER |
| SENIOR ANALOG IC DESIGNER |
| ANALOG/MIXED SIGNAL/LAYOUT ENGINEERS FOR INDIA |
| SENIOR PHYSICAL DESIGN ENGINEER |
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Responsibilities: |
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Be responsible for the specification, development and verification of CMOS I/O circuits to support SCSI, USB2.0, SSTL & LVDS IO's |
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Requirements: |
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Must have at least a B.Tech.(Electronics)/BSEE ; M.Tech.(Electronics)/MSEE is preferable |
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Must have 3-6 Years of experience in I/O design |
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Must have experience on at least one project designing with 130nm or smaller technology |
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Must be proficient in using schematics entry tools & Spice simulators |
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Must have good design experience and understanding of ESD circuits |
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Experience in designing SCSI transceiver is plus |
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Key Skills: |
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Spice simulation, CMOS circuit design |
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| ANALOG DESIGN ENGINEER |
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QualCore Logic (Analog) Inc. is looking for Analog Design Engineers to develop analog and mixed signal ICs for industrial and commercial applications. Perform detailed transistor level circuit design coupled with the architectural design and behavioral modeling. Simulate circuits and direct the layout process. Requires Bachelor's degree in Electircal/Electronics Engineering with 3 years experience" |
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| SENIOR ANALOG IC DESIGNER |
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| Will be the project lead on CMOS Analog IC cell development projects. |
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Responsibilities: include interfacing with customers, performing analog system level design and definition, overseeing lower level design Engineers. Also provides guidance and direction, performs design and simulation tasks and oversees layout development.
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Experience and skills required: Must have hands-on design experience with most of the following types of CMOS cells: ADC's, DAC's, Bandgaps, Opamps, PLL's. Experience designing high speed pipeline CMOS ADC's a plus. Must be familiar with schematic capture, spice and layout tools and have good communication skills (both written and verbal) and leadership ability.
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Education: Must have 4 year technical degree or equivalent, 6+ years of analog and mixed signal IC design experience at the transistor level with 2+years doing CMOS Analog IC design.
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| ANALOG/MIXED SIGNAL/LAYOUT ENGINEERS FOR INDIA |
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QualCore Logic Ltd. invites Fresh/Experienced engineers in the US willing to work in India to apply for the position of Analog/Mixed Design/Layout Engineers. The selected employees will be provided training at our US office, if possible, before their return to the Development Center in Hyderabad.
Job Description: Candidate will design/layout State of the Art, High Performance Analog Blocks like, PLLs and DLLs for Clock Synthesis and High Speed I/O Interfaces, Clock-Data Recovery Circuits for High-Speed Serial Links, ADC's, DAC's, Band-Gap References, Voltage Regulators, Temperature Monitors, Standard Cells & IO's, etc., in Deep Sub-Micron CMOS Process Technologies.
Preferred Education: Should have an M.S
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| SENIOR PHYSICAL DESIGN ENGINEER |
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Responsibility: To lead and to provide technical guidance to a QualCore(India).Physical Design team of 7-8 members, which on 2-4 seperate projects at the same time.
Experience and skills required: |
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Handson experience with Cadence Physical Design Flow (SOC Encounter, PKS, CeltIC, VoltageStorm, Fire & Ice etc.). Note: Even though Cadence flow is the most preferred, extensive expertise in Syonpsys/Magma flows can also be cosidered. |
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Worked on the latest technologies(upto 0.09um). |
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Experience in handson block level as well as chip level Physical Design. |
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