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B.E / B.Tech or M.E / M.Tech |
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Experience: |
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2+ years of experience |
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Key Skills: |
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DSP/Matlab, Simulink, Perl, Synplify DSP |
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Responsibilities: |
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Feasibility study (idea creation, design for verification, new verification
methodology) |
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Run regressions and report results |
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| Requirements: |
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Well versed with Silicon Architecture components like RAM/FIFO, PLL, IPs, DSP functions,
AMBA, ARM, 8051 |
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Strong with FPGA architecture |
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Strong with Unix/Linux OS |
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Strong with Shell/PERL Scripting |
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Run experiments with the tools and publish results |
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Familiar with DSP/Matlab |
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Familiar with Simulink |
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Familiar with System Verilog |
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Familiar with Timing constraints |
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Hands-on experience with Synplify/Precision, ModelSim and/or Aldec |
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Familiar with Synplify DSP |
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| Location: Hyderabad, India |
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| Please send your
resume to hr@qualcorelogic.com with
the relevant code in the subject. |
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HRD
- Recruitment
QualCore Logic Ltd.
7-145 Nagendra Nagar,
Habsiguda,
Hyderabad - 500 007
India
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