 |
M. Tech. / M. E. in EE + 2 yrs, B. E. / B. Tech in EE + 4yrs |
 |
 |
Experience: |
|
 |
Minimum 4 years of experience in the relevant field |
 |
 |
Key Skills: |
|
 |
CMOS Circuit design, i/o Pads, Verilog, HSPICE, CMOS Device Physics |
|
 |
Responsibilities: |
|
 |
Design and Development of standard digital cells |
|
 |
Design of standard I/Os, Power and ground I/O design, special I/Os like LVDS, SSTL, HSTL, TMDS |
|
 |
Design of ESD protection circuits and latch-up prevention circuits |
|
 |
Run simulation of test chip circuits and evolving/enhancing I/O design |
|
 |
| Requirements: |
 |
 |
Should have a good understanding of clamp circuits, ESD issues and latch-up issues |
|
 |
Should have a good understanding of custom layout |
|
 |
Must have strong CMOS / Bi-CMOS design concepts and skills, with a solid understanding of device physics |
|
 |
Strong comprehension of circuit design & interaction with fabrication process is an added advantage |
 |
|
Those with good command over Verilog and having knowledge of Verilog-A will be given a preference |
 |
 |
| Location: Hyderabad, India |
 |
 |
| Please send your
resume to hr@qualcorelogic.com with
the relevant code in the subject. |
 |
 |
HRD
- Recruitment
QualCore Logic Ltd.
7-145 Nagendra Nagar,
Habsiguda,
Hyderabad - 500 007
India
|
|
|