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B.E./B.Tech in Electronics and Communications/Electrical and Electronics |
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Experience: |
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6+ years of experience as Analog Layout Engineer |
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Key Skills: |
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Analog IC Layout |
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DRC/LVS/Antenna checks |
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CMOS device physics |
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CMOS fabrication knowledge |
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Perl and Shell scripting |
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Responsibilities: |
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Would be responsible to lead and guide a team of 5 to 10 Analog Layout Engineers |
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Would work on custom layout Analog IPs like PLLs, DLLs, ADCs, DACs, Voltage Reference Generators, High speed IOs like LVDS, SSTL and custom layout of standard cells |
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 | Hands on experience in Full chip layout |
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 | Performing verification checks like DRC/LVS/Antenna and fixing violations |
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 | Work closely with the Design engineers and Layout engineers in designing and successfully delivering Analog Layouts |
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 | Need to work and review layouts which produces good yield |
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Requirements: |
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Experience in using Cadence Virtuoso Layout Editor, Mentor Graphics Calibre verification tool |
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Experience in performing various kinds of Analog Layouts, their implementations from top-level floor planning down to complex block level layouts |
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Knowledge of various Analog Layout Techniques |
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Understanding of circuit principles as affected by layout such as speed, capacitance, power, noise and area |
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Ability to exchange and communicate information with Analog Designers and the team members |
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Possess good team building skills |
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Excellent communication, documentation and presentation skills |
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Strong analytical and problem-solving skills |
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| Location: Hyderabad, India |
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| Please send your
resume to hr@qualcorelogic.com with
the relevant code in the subject. |
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HRD
- Recruitment
QualCore Logic Ltd.
7-145 Nagendra Nagar,
Habsiguda,
Hyderabad - 500 007
India
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